Skip to Main content Skip to Navigation

Assouplir les contraintes des architectures SIMT à faible coût

Nicolas Brunie 1, 2, 3, * Caroline Collange 1, 2 
* Corresponding author
1 ARENAIRE - Computer arithmetic
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
Abstract : Parallel architectures following the SIMT model such as GPUs benefit from application regularity by issuing concurrent threads running in lockstep on SIMD units. As threads take different paths across the control-flow graph, lockstep execution is partially lost, and must be regained whenever possible in order to maximize the occupancy of SIMD units. In this paper, we propose two techniques to handle SIMT control divergence and identify reconvergence points. The most advanced one operates in constant space and handles indirect jumps and recursion. We evaluate a hardware implementation which leverage the existing memory divergence management unit. In terms of performance, this solution is at least as efficient as state of the art techniques in use in current GPUs.
Document type :
Complete list of metadata

Cited literature [20 references]  Display  Hide  Download
Contributor : Caroline Collange Connect in order to contact the contributor
Submitted on : Wednesday, December 7, 2011 - 11:53:09 AM
Last modification on : Friday, September 30, 2022 - 4:02:38 AM
Long-term archiving on: : Friday, November 16, 2012 - 2:40:31 PM


Files produced by the author(s)


  • HAL Id : ensl-00649186, version 1


Nicolas Brunie, Caroline Collange. Assouplir les contraintes des architectures SIMT à faible coût. [Rapport de recherche] ENS Lyon. 2011. ⟨ensl-00649186⟩



Record views


Files downloads