HAL will be down for maintenance from Friday, June 10 at 4pm through Monday, June 13 at 9am. More information
Skip to Main content Skip to Navigation
Conference papers

An FPGA architecture for solving the Table Maker's Dilemma

Florent de Dinechin 1, 2 Jean-Michel Muller 1 Bogdan Pasca 1 Alexandru Plesco 3
1 ARENAIRE - Computer arithmetic
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
3 COMPSYS - Compilation and embedded computing systems
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
Abstract : Solving the Table Maker's Dilemma, for a given function and a given target floating-point format, requires testing the value of the function, with high precision, at a very large number of consecutive values. We give an algorithm that allows for performing such computations on a very regular architecture, and present an FPGA implementation of that algorithm.
Document type :
Conference papers
Complete list of metadata

Cited literature [8 references]  Display  Hide  Download

https://hal-ens-lyon.archives-ouvertes.fr/ensl-00640063
Contributor : Jean-Michel Muller Connect in order to contact the contributor
Submitted on : Monday, November 14, 2011 - 1:49:41 PM
Last modification on : Thursday, January 20, 2022 - 4:13:54 PM
Long-term archiving on: : Wednesday, February 15, 2012 - 2:20:41 AM

File

PID1914885.pdf
Files produced by the author(s)

Identifiers

Collections

Citation

Florent de Dinechin, Jean-Michel Muller, Bogdan Pasca, Alexandru Plesco. An FPGA architecture for solving the Table Maker's Dilemma. Application-Specific Systems, Architectures and Processors (ASAP), 2011 IEEE International Conference on, Sep 2011, Santa Monica, United States. pp.187-194, ⟨10.1109/ASAP.2011.6043267⟩. ⟨ensl-00640063⟩

Share

Metrics

Record views

340

Files downloads

257