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Conference papers
An FPGA architecture for solving the Table Maker's Dilemma
Abstract : Solving the Table Maker's Dilemma, for a given function and a given target floating-point format, requires testing the value of the function, with high precision, at a very large number of consecutive values. We give an algorithm that allows for performing such computations on a very regular architecture, and present an FPGA implementation of that algorithm.
Cited literature [8 references]
https://hal-ens-lyon.archives-ouvertes.fr/ensl-00640063
Contributor : Jean-Michel Muller Connect in order to contact the contributor
Submitted on : Monday, November 14, 2011 - 1:49:41 PM
Last modification on : Thursday, January 20, 2022 - 4:13:54 PM
Long-term archiving on: : Wednesday, February 15, 2012 - 2:20:41 AM
Contributor : Jean-Michel Muller Connect in order to contact the contributor
Submitted on : Monday, November 14, 2011 - 1:49:41 PM
Last modification on : Thursday, January 20, 2022 - 4:13:54 PM
Long-term archiving on: : Wednesday, February 15, 2012 - 2:20:41 AM
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PID1914885.pdf
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