FPGA-Specific Custom Arithmetic Datapath Design

Florent De Dinechin 1, * Bogdan Pasca 1
* Auteur correspondant
1 ARENAIRE - Computer arithmetic
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
Abstract : This paper presents FloPoCo, a framework for easily designing custom arithmetic datapaths for FPGAs. Its main features are: an important basis of highly optimized arithmetic operators, a unique methodology for frequency-directed pipelining the designed circuits and a flexible test-bench generation suite for numerically validating the designs. The framework was tested for designing several complex arithmetic operators, this paper presenting the architecture and results for the exponential operator. Synthesis results capture the designed operator's flexibility: automatically optimized for several Altera and Xilinx FPGAs, wide range of target frequencies and several precisions ranging from single to quadruple precision.
Type de document :
Pré-publication, Document de travail
RR2010-34. 2010
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https://hal-ens-lyon.archives-ouvertes.fr/ensl-00542396
Contributeur : Bogdan Pasca <>
Soumis le : jeudi 2 décembre 2010 - 14:41:39
Dernière modification le : mardi 16 janvier 2018 - 15:42:48
Document(s) archivé(s) le : lundi 5 novembre 2012 - 11:10:35

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arithmetic_pipeline.pdf
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  • HAL Id : ensl-00542396, version 1

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Florent De Dinechin, Bogdan Pasca. FPGA-Specific Custom Arithmetic Datapath Design. RR2010-34. 2010. 〈ensl-00542396〉

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