Skip to Main content Skip to Navigation
Conference papers

Floating-point exponential functions for DSP-enabled FPGAs

Florent de Dinechin 1, 2 Bogdan Pasca 1, 2 
1 ARENAIRE - Computer arithmetic
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
Abstract : This article presents a floating-point exponential operator generator targeting recent FPGAs with embedded memories and DSP blocks. A single-precision operator consumes just one DSP block, 18Kbits of dual-port memory, and 392 slices on Virtex-4. For larger precisions, a generic approach based on polynomial approximation is used and proves more resource-efficient than the literature. For instance a double-precision operator consumes 5 BlockRAM and 12 DSP48 blocks on Virtex-5, or 10 M9k and 22 18x18 multipliers on Stratix III. This approach is flexible, scales well beyond double-precision, and enables frequencies close to the FPGA's nominal frequency. All the proposed architectures are last-bit accurate for all the floating-point range.They are available in the open-source FloPoCo framework.
Document type :
Conference papers
Complete list of metadata

Cited literature [17 references]  Display  Hide  Download
Contributor : Florent de Dinechin Connect in order to contact the contributor
Submitted on : Tuesday, July 27, 2010 - 12:25:16 PM
Last modification on : Friday, February 4, 2022 - 3:11:10 AM
Long-term archiving on: : Tuesday, October 23, 2012 - 11:30:33 AM


Files produced by the author(s)


  • HAL Id : ensl-00506125, version 1



Florent de Dinechin, Bogdan Pasca. Floating-point exponential functions for DSP-enabled FPGAs. International Conference on Field-Programmable Technology, Dec 2010, Beijing, China. pp.110-117. ⟨ensl-00506125⟩



Record views


Files downloads