Complexity analysis and performance evaluation of matrix product on multicore architectures

Abstract : The multicore revolution is underway, bringing new chips introducing more complex memory architectures. Classical algorithms must be revisited in order to take the hierarchical memory layout into account. In this paper, we aim at minimizing the number of cache misses paid during the execution of the matrix product kernel on a multicore processor, and we show how to achieve the best possible tradeoff between shared and distributed caches. Comprehensive simulation results confirm the analytical performance predictions and fully establish the practical significance of our new algorithms.
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Submitted on : Tuesday, May 5, 2009 - 3:48:26 PM
Last modification on : Tuesday, December 11, 2018 - 10:58:13 AM
Long-term archiving on : Monday, October 15, 2012 - 9:56:31 AM

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  • HAL Id : ensl-00381458, version 1

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Mathias Jacquelin, Loris Marchal, Yves Robert. Complexity analysis and performance evaluation of matrix product on multicore architectures. 2009. ⟨ensl-00381458⟩

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