Generating high-performance custom floating-point pipelines

Florent de Dinechin 1, 2 Cristian Klein 1, 2 Bogdan Pasca 1, 2
1 ARENAIRE - Computer arithmetic
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
Abstract : Custom operators, working at custom precisions, are a key ingredient to fully exploit the FPGA flexibility advantage for high-performance computing. Unfortunately, such operators are costly to design, and application designers tend to rely on less efficient off-the-shelf operators. To address this issue, an open-source architecture generator framework is introduced. Its salient features are an easy learning curve from VHDL, the ability to embedd arbitrary synthesisable VHDL code, portability to mainstream FPGA targets from Xilinx and Altera, automatic management of complex pipelines with support for frequency-directed pipeline, automatic test-bench generation. This generator is presented around the simple example of a collision detector, which it significantly improves in accuracy, DSP count, logic usage, frequency and latency with respect to an implementation using standard floating-point operators.
Document type :
Conference papers
Complete list of metadatas

Cited literature [12 references]  Display  Hide  Download

https://hal-ens-lyon.archives-ouvertes.fr/ensl-00379154
Contributor : Florent de Dinechin <>
Submitted on : Tuesday, April 28, 2009 - 5:45:56 PM
Last modification on : Wednesday, November 20, 2019 - 2:40:57 AM
Long-term archiving on : Saturday, November 26, 2016 - 8:24:08 AM

File

RR-LIP-2009-16.pdf
Files produced by the author(s)

Identifiers

  • HAL Id : ensl-00379154, version 2

Collections

Citation

Florent de Dinechin, Cristian Klein, Bogdan Pasca. Generating high-performance custom floating-point pipelines. Field Programmable Logic and Applications, Aug 2009, Prague, Czech Republic. ⟨ensl-00379154v2⟩

Share

Metrics

Record views

367

Files downloads

805