Generating high-performance custom floating-point pipelines - Archive ouverte HAL Access content directly
Conference Papers Year : 2009

Generating high-performance custom floating-point pipelines

(1, 2) , (1, 2) , (1, 2)
1
2

Abstract

Custom operators, working at custom precisions, are a key ingredient to fully exploit the FPGA flexibility advantage for high-performance computing. Unfortunately, such operators are costly to design, and application designers tend to rely on less efficient off-the-shelf operators. To address this issue, an open-source architecture generator framework is introduced. Its salient features are an easy learning curve from VHDL, the ability to embedd arbitrary synthesisable VHDL code, portability to mainstream FPGA targets from Xilinx and Altera, automatic management of complex pipelines with support for frequency-directed pipeline, automatic test-bench generation. This generator is presented around the simple example of a collision detector, which it significantly improves in accuracy, DSP count, logic usage, frequency and latency with respect to an implementation using standard floating-point operators.
Fichier principal
Vignette du fichier
RR-LIP-2009-16.pdf (183.45 Ko) Télécharger le fichier
Origin : Files produced by the author(s)
Loading...

Dates and versions

ensl-00379154 , version 1 (27-04-2009)
ensl-00379154 , version 2 (28-04-2009)

Identifiers

  • HAL Id : ensl-00379154 , version 2

Cite

Florent de Dinechin, Cristian Klein, Bogdan Pasca. Generating high-performance custom floating-point pipelines. Field Programmable Logic and Applications, Aug 2009, Prague, Czech Republic. ⟨ensl-00379154v2⟩
251 View
817 Download

Share

Gmail Facebook Twitter LinkedIn More