Generating high-performance arithmetic operators for FPGAs

Abstract : This article addresses the development of complex, heavily parameterized and flexible operators to be used in FPGA-based floating-point accelerators. Languages such as VHDL or Verilog are not ideally suited for this task. The main problem is the automation of problems such as parameter-directed or target-directed architectural optimization, pipeline optimization, and generation of relevant test benches. This article introduces FloPoCo, an open object-oriented software framework designed to address these issues. Written in C++, it inputs operator specifications, a target FPGA and and an objective frequency, and outputs synthesisable VHDL fine-tuned for this FPGA at this frequency. Its design choices are discussed and validated on various operators.
Type de document :
Pré-publication, Document de travail
LIP research report 2008-28. 2008
Liste complète des métadonnées

Littérature citée [6 références]  Voir  Masquer  Télécharger

https://hal-ens-lyon.archives-ouvertes.fr/ensl-00321209
Contributeur : Florent De Dinechin <>
Soumis le : vendredi 12 septembre 2008 - 15:44:52
Dernière modification le : mardi 24 avril 2018 - 13:52:39
Document(s) archivé(s) le : lundi 8 octobre 2012 - 13:05:57

Fichier

DinechinKleinPasca.pdf
Fichiers produits par l'(les) auteur(s)

Identifiants

  • HAL Id : ensl-00321209, version 1

Collections

Citation

Florent De Dinechin, Cristian Klein, Bogdan Pasca. Generating high-performance arithmetic operators for FPGAs. LIP research report 2008-28. 2008. 〈ensl-00321209〉

Partager

Métriques

Consultations de la notice

175

Téléchargements de fichiers

295