Generating high-performance arithmetic operators for FPGAs - ENS de Lyon - École normale supérieure de Lyon Accéder directement au contenu
Pré-Publication, Document De Travail Année : 2008

Generating high-performance arithmetic operators for FPGAs

Résumé

This article addresses the development of complex, heavily parameterized and flexible operators to be used in FPGA-based floating-point accelerators. Languages such as VHDL or Verilog are not ideally suited for this task. The main problem is the automation of problems such as parameter-directed or target-directed architectural optimization, pipeline optimization, and generation of relevant test benches. This article introduces FloPoCo, an open object-oriented software framework designed to address these issues. Written in C++, it inputs operator specifications, a target FPGA and and an objective frequency, and outputs synthesisable VHDL fine-tuned for this FPGA at this frequency. Its design choices are discussed and validated on various operators.
Fichier principal
Vignette du fichier
DinechinKleinPasca.pdf (132.36 Ko) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

ensl-00321209 , version 1 (12-09-2008)

Identifiants

  • HAL Id : ensl-00321209 , version 1

Citer

Florent de Dinechin, Cristian Klein, Bogdan Pasca. Generating high-performance arithmetic operators for FPGAs. 2008. ⟨ensl-00321209⟩
122 Consultations
552 Téléchargements

Partager

Gmail Facebook X LinkedIn More