| Identifiant de l'article : |
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ensl-00174627, version 1 |
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| Domaine : |
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Informatique/Arithmétique des ordinateurs
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| Titre : |
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When FPGAs are better at floating-point than microprocessors |
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| Auteur(s) : |
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Florent De Dinechin1, Jérémie Detrey1, Octavian Creţ2, Radu Tudoran2 |
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| Laboratoire : |
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| 1 : |
LIP - Laboratoire de l'Informatique du Parallélisme |
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UTCN - Universitatea Tehnica din Cluj-Napoca |
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| Équipe de recherche : |
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[ARENAIRE - Arithmétique des ordinateurs] |
| Résumé : |
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It has been shown that FPGAs could outperform high-end microprocessors on floating-point computations thanks to massive parallelism. However, most previous studies re-implement in the FPGA the operators present in a processor. This is a safe and relatively straightforward approach, but it doesn't exploit the greater flexibility of the FPGA. This article is a survey of the many ways in which the FPGA implementation of a given floating-point computation can be not only faster, but also more accurate than its microprocessor counterpart. Techniques studied here include custom precision, specific accumulator design, dedicated architectures for coarser operators which have to be implemented in software in processors, and others. A real-world biomedical application illustrates these claims. This study also points to how current FPGA fabrics could be enhanced for better floating-point support. |
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Langue du texte
intégral : |
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Anglais |
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| Mots-clés : |
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FPGA – Reconfigurable computing – Floating-point |
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| Contrat, financement : |
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PAI Brancusi |
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